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Digvijay Gaikwad

FPGA / RTL Developer

About

I’m Digvijay Gaikwad, an aspiring FPGA and Low-Latency HFT Engineer focused on SystemVerilog, digital design, and FPGA-based trading systems. I’m eager to contribute to high-performance engineering teams and grow my expertise.

Looking for

I’m Digvijay Gaikwad, an aspiring FPGA and Low-Latency HFT Engineer with a strong interest in digital design, hardware acceleration, and performance-critical systems. I’m developing an FPGA-based trading system focused on Ethernet/IPv4/UDP packet parsing, market-data extraction, BRAM-based order-book design, pipelined risk controls, AXI-Stream interfaces, and RTL verification using SystemVerilog. I’m eager to contribute to engineering teams working on FPGA development, low-latency trading infrastructure, and high-performance hardware systems. I’m committed to strengthening my technical skills, solving complex engineering problems, and learning from experienced professionals.

Skills

VerilogSystemVerilogFPGARTL DesignVivadoAXI-StreamPythonC++SQLTableauPower BIFinancial ModelingDerivatives PricingQuantitative Analysis

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